UNITED STATES
SECURITIES AND EXCHANGE COMMISSION

Washington, D.C. 20549

FORM 10-K

(Mark One)

x                              ANNUAL REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE
SECURITIES EXCHANGE ACT OF 1934 FOR THE FISCAL YEAR ENDED
JANUARY 1, 2005

or

o                                 TRANSITION REPORT PURSUANT TO SECTION 13 OR 15(d) OF THE
SECURITIES EXCHANGE ACT OF 1934

FOR THE TRANSITION PERIOD FROM                   TO                  

Commission file number: 000-18032

LATTICE SEMICONDUCTOR CORPORATION

(Exact name of Registrant as specified in its Charter)

Registrant’s telephone number, including area code: (503) 268-8000

Securities registered pursuant to Section 12(b) of the Act: None

Securities registered pursuant to Section 12(g) of the Act:

Indicate by check mark whether the registrant (1) has filed all reports required to be filed by Section 13 or 15(d) of the Securities Exchange Act of 1934 during the preceding 12 months (or for such shorter period that the registrant was required to file such reports), and (2) has been subject to such filing requirements for the past 90 days. Yes x No o

Indicate by check mark if disclosure of delinquent filers pursuant to Item 405 of Regulation S-K is not contained herein, and will not be contained, to the best of the registrant’s knowledge, in definitive proxy or information statements incorporated by reference in Part III of this Form 10-K or any amendment to this Form 10-K. x

Indicate by check mark whether the Registrant is an accelerated filer (as defined in Rule 12b-2 of the Act). Yes x No o

As of July 3, 2004 (the last business day of the Registrant’s second quarter of fiscal 2004), the aggregate market value of the shares of voting stock (Common Stock) of the Registrant held by non-affiliates was approximately $452.5 million based on the last sales price of the Registrant’s Common Stock on the Nasdaq National Market on such date. Shares of Common Stock held by each officer and director and by each person who owns 5% or more of the outstanding Common Stock have been excluded in that such persons may be deemed affiliates. This determination of affiliate status is not necessarily a conclusive determination for other purposes.

As of March 11, 2005, 113,611,860 shares of the Registrant’s common stock were outstanding.

DOCUMENTS INCORPORATED BY REFERENCE

Portions of the definitive proxy statement of the Registrant to be filed pursuant to Regulation 14A for the 2005 Annual Meeting of Stockholders to be held on May 3, 2005 are incorporated by reference in Part III hereof.

LATTICE SEMICONDUCTOR CORPORATION
FORM 10-K
ANNUAL REPORT

TABLE OF CONTENTS

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Forward-Looking Statements

This Annual Report on Form 10-K contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933, as amended, and Section 21E of the Exchange Act. Any statements about our expectations, beliefs, plans, objectives, assumptions or future events or performance are not historical facts and may be forward-looking. We use words or phrases such as “anticipates,” “believes,” “estimates,” “expects,” “intends,” “plans,” “projects,” “may,” “will,” “should,” “continue,” “ongoing,” “future,” “potential” and similar words or phrases to identify forward-looking statements.

Forward-looking statements involve estimates, assumptions, risks and uncertainties that could cause actual results to differ materially from those expressed in them. Among the key factors that could cause our actual results to differ materially from the forward-looking statements are delay in product or technology development, change in economic conditions of the various markets we serve, lack of market acceptance or demand for our new products, dependencies on silicon wafer suppliers and semiconductor assemblers, the impact of competitive products and pricing, opportunities or acquisitions that we pursue, the availability and terms of financing, and the other risks that are described herein and that are otherwise described from time to time in our filings with the Securities and Exchange Commission, including but not limited to the items discussed in “Factors Affecting Future Results” set forth in “Management’s Discussion and Analysis of Financial Condition and Results of Operations” in Item 7 of this report. You should not unduly rely on forward-looking statements because our actual results could differ materially from those expressed in any forward-looking statement made by us. Further, any forward-looking statement applies only as of the date on which it is made. We are not required to update any forward-looking statement or statements to reflect events or circumstances after the date on which such statement is made or to reflect the occurrence of unanticipated events.

Item 1. Business.

Lattice Semiconductor Corporation designs, develops and markets high performance programmable logic products and related software. Programmable logic products are widely-used semiconductor components that can be configured by end customers as specific logic circuits, and thus enable shorter design cycle times and reduced development costs. Our end customers are primarily original equipment manufacturers in the communications, computing, consumer, industrial, automotive, medical and military end markets.

Lattice was incorporated in Oregon in 1983 and reincorporated in Delaware in 1985. Our principal offices are located at 5555 N.E. Moore Court, Hillsboro, Oregon 97124, our telephone number is (503) 268-8000 and our website can be accessed at www.latticesemi.com. Information contained or referenced on our website is not incorporated by reference in and does not form a part of this Annual Report on Form 10-K.

We report based on a 52 or 53 week year ending on the Saturday closest to December 31. For ease of presentation, we have adopted the convention of using March 31, June 30, September 30 and December 31 as period end dates for all financial statement information. Our fiscal 2004 and 2002 were 52-week years. Our 2003 fiscal year was a 53-week year.

Programmable Logic Market Background

Three principal types of digital integrated circuits are used in most electronic systems: microprocessors, memory and logic. Microprocessors are used for control and computing tasks, memory is used to store programming instructions and data, and logic is employed to manage the interchange and manipulation of digital signals within a system. Logic contains interconnected groupings of simple logical “and” and logical “or” functions, commonly described as “gates.” Typically, complex combinations of individual gates are required to implement the specialized logic functions required for systems

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applications. While system designers use a relatively small variety of standard products to meet their microprocessor and memory needs, they require a wide variety of logic products in order to achieve end product functionality and differentiation.

Logic circuits are found in a wide range of today’s digital electronic equipment including communications, computing, consumer, industrial, automotive, medical, and military systems. According to Gartner¹, logic accounted for approximately 37% of the estimated $220 billion worldwide semiconductor market in 2004. The logic market encompasses general purpose logic semiconductor products, which include programmable logic devices, and application-specific semiconductor devices, which includes ASICs (devices marketed to a single user) and ASSPs (devices marketed to multiple users).

Manufacturers of electronic equipment are challenged to bring differentiated products to market quickly. These competitive pressures often preclude the use of custom-designed ASICs, which generally entail significant design risks, non-recurring costs and time delays. Standard logic products, an alternative to custom-designed ASICs, limit a manufacturer’s flexibility to adequately customize an end system. Programmable logic addresses this inherent dilemma. Programmable logic is a standard semiconductor product, purchased by systems manufacturers in a “blank” state, that can be custom configured into virtually unlimited combinations of specific logic functions by programming the device with electrical signals. Programmable logic gives system designers the ability to quickly create custom logic functions to provide product differentiation without sacrificing rapid time to market.

According to Gartner¹, the programmable logic market was approximately $3.1 billion in 2004. Within this market, there are two main segments, programmable logic devices (“PLDs”) and field programmable gate arrays (“FPGAs”), each representing a distinct silicon architectural approach. Our company believes that, in 2004, PLD was a $0.6 billion market while FPGA was a $2.5 billion market. Products based on the two alternative programmable logic architectures are generally optimal for different types of logic functions, although many logic functions can be implemented using either architecture. PLDs are characterized by a regular building block structure of wide-input logic cells, called macrocells, and use a centralized logic interconnect scheme. FPGAs are characterized by a narrow-input logic cell and use a distributed interconnect scheme. FPGAs may also contain dedicated blocks of fixed circuits such as memory, high-speed input/output interfaces or processors. Although PLDs and FPGAs are typically suited for use in distinct types of logic applications, we believe that a substantial portion of programmable logic customers utilize both PLD and FPGA products.

Lattice Products

We strive to offer innovative and differentiated programmable solutions based on our proprietary technology and intellectual property.

(1)          Semiconductor Forecast Worldwide—Forecast Database,” Richard Gordon, Gartner, Feb 15, 2005

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FPGA Products

In 2002, we entered the FPGA market as a result of our acquisition of the FPGA business of Agere and the introduction of our internally developed ispXP™ product families. During 2004, approximately 19% of our revenue was derived from FPGA products, as compared to 18% in 2003 and 12% in 2002. In the future, we plan to introduce new families of innovative, high performance and higher density FPGAs. The key features of our newest FPGA families currently in production are described in the table below:

The Lattice EC/ECP families, introduced in 2004, are our newest FPGA products available in volume production. These families were designed to provide customers the lowest total solution cost and support emerging requirements in high volume applications. Additionally, these families provide several unique, performance enhancing features not currently available in competitive low-cost FPGA families. These features include built-in double data rate (“DDR”) memory support, a flexible high-performance DSP block and support for industry standard, low cost, SPI-flash boot memories.

Our ORCA 4 family of field programmable system chips (“FPSCs”) combines generic FPGAs with embedded intellectual property cores on a single programmable chip, offering customers the ability to quickly implement complex system-level designs in a flexible manner. Currently, we offer eight FPSC devices, the ORT82G5, ORT42G5, ORT8850L, ORT8850H, ORLI10G, ORSO82G5, ORSO42G5 and ORSPI4, based on the ORCA 4 FPGA platform. These devices incorporate high-speed interface protocols, offering up to 3.7 Gbs SERDES, and other application-specific circuit blocks that allow customers to develop high performance designs to implement 10 Gigabit Ethernet and SONET applications within advanced communications systems.

Our ispXP families feature extended programmability (“XP™”) technology and represent our first generation of non-volatile FPGA products. XP technology provides customers with several benefits compared to traditional volatile FPGAs, based on SRAM technology, which currently make up the majority of the FPGA market. These benefits include enhanced security, instant-on logic functionality and elimination of external programming devices.

We also offer an additional product family, the ispGDX®, that targets a unique aspect of the programmable logic market. This family extends in-system programmability to the circuit board level using an innovative digital cross-point switch architecture. Offered with propagation delays as low as 3.0 nanoseconds, ispGDX products are targeted toward digital signal interconnect and interface applications.

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PLD Products

During 2004, approximately 81% of our revenue was derived from PLD products, as compared to 82% in 2003 and 88% in 2002. At present, we offer the industry’s broadest line of PLDs based on our numerous families of ispLSI®, ispMACH™ and GAL® products. In the future, we plan to continue to introduce new families of innovative PLD products, as well as improve the performance and reduce the manufacturing cost of our existing product families based on market needs. We believe that our multiple families of leadership PLD products provide us with a competitive advantage in this market. The key features of our newest PLD families are described in the table below:

In addition to high performance, the ispMACH 4000Z family features an architecture optimized to ensure ultra-low power consumption. Devices within this new family, targeted toward handheld and portable equipment, typically operate using 10-15 microamps of current while in standby mode.

We also offer the industry’s broadest line of low-density simple PLDs (“SPLD”), based on our 18 families of GAL products offered in over 200 speed, power, package and temperature range combinations. These devices range in complexity from approximately 200 to 1,000 logic gates and are typically assembled in 20-, 24-and 28-pin standard dual in-line packages and in 20-and 28-pin standard plastic leaded chip carrier packages. We offer the standard 16V8, 20V8 and 22V10 architectures in a variety of speed grades, with propagation delays as low as 3.5 nanoseconds, the highest performance in the industry.

In addition, we have recently introduced the ispPAC®-CLK and ispPAC-PWR families of programmable mixed signal devices. These devices, featuring a combination of programmable logic and programmable analog, allow system designers to quickly and easily implement a wide variety of power and clock management functions within a single integrated circuit. ispPAC products can replace numerous discrete components while providing customers with additional design flexibility and time to market benefits. We believe these devices provide an opportunity to extend our proprietary technology to an untapped potential market.

Software Development Tools

Our products are supported by the ispLEVER® 4.2 software development tool suite and PAC-Designer™ software. Supporting the PC, UNIX and LINUX platforms, ispLEVER software allows our customers to enter, verify and synthesize a design, perform logic simulation and timing analysis, assign input/output pins, designate critical paths, debug, execute automatic timing-driven place and route tasks, and download logic and input/output configurations to one of our devices. Seamlessly integrated with third-party electronic design automation environments, ispLEVER software provides a front-to-back design flow that leverages a customer’s prior investment in tools offered by Cadence, Mentor Graphics, Synopsys and Synplicity. In the future, we plan to continue to enhance and expand the capability of our software development tool suite.

Product Development

We place substantial emphasis on new product development and believe that continued investment in this area is required to maintain and improve our competitive position. Our product development activities emphasize new proprietary products, enhancement of existing products and process technologies and

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improvement of software development tools. Product development activities occur in Hillsboro, Oregon; San Jose, California; Broomfield, Colorado; Naperville, Illinois; Bethlehem, Pennsylvania; Austin, Texas; Salt Lake City, Utah; Shanghai, China; and Chippenham, England.

Research and development expenses were $91.0 million in 2004, $87.1 million in 2003 and $85.8 million in 2002. We expect to continue to make significant future investments in research and development.

Operations

We do not manufacture our own silicon wafers. We maintain strategic relationships with large semiconductor foundries to source our finished silicon wafers. This strategy allows us to focus our internal resources on product, process and market development, and eliminates the fixed cost of owning and operating manufacturing facilities. We are also able to take advantage of the ongoing advanced process technology development efforts of semiconductor foundries. In addition, all of our assembly operations and most of our test operations are performed by outside suppliers. We perform certain test operations and reliability and quality assurance processes internally. We have achieved and maintained ISO 9001 quality certification since 1993, which is an indication of our high internal operational standards.

Wafer Fabrication

We source silicon wafers from our foundry partners, Fujitsu Limited (“Fujitsu”) in Japan, Seiko Epson in Japan, United Microelectronics Corporation (“UMC”) in Taiwan and Chartered Semiconductor Manufacturing, Ltd. (“Chartered Semiconductor”) in Singapore, pursuant to agreements with each company and their respective affiliates. We negotiate wafer volumes, prices and other terms with our foundry partners and their respective affiliates on a periodic basis.

Assembly

After wafer fabrication and initial testing, we ship wafers to independent subcontractors for assembly. During assembly, wafers are separated into individual die and encapsulated in plastic or ceramic packages. Presently, we have qualified long-term assembly partners in China, Japan, Malaysia, the Philippines, South Korea, and Taiwan. We negotiate assembly prices, volumes, and other terms with our assembly partners and their respective affiliates on a periodic basis.

Testing

We electrically test the die on each wafer prior to shipment for assembly. Following assembly, prior to customer shipment, each product undergoes final testing and quality assurance procedures. Final testing on certain products is performed by independent contractors in China, Malaysia, the Philippines, South Korea and Taiwan, and at our Oregon facility.

Marketing, Sales and Customers

We sell our products directly to end customers through a network of independent manufacturers’ representatives and indirectly through a network of independent distributors. We also employ a direct sales management and field applications engineering organization to support our end customers and indirect sales resources. Our end customers are primarily original equipment manufacturers in the communications, computing, consumer, industrial, automotive, medical and military end markets.

As of December 2004, we used 20 manufacturers’ representatives and two distributors, Arrow Electronics, Inc. and Avnet Inc., in North America. We have also established export sales channels in over 25 foreign countries through a network of over 25 sales representatives and distributors. The majority of our sales are made through distributors.

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We protect each of our North American distributors and some of our foreign distributors against reductions in published prices, and expect to continue this policy in the foreseeable future. We also allow returns from these distributors of unsold products under certain conditions. For these reasons, we do not recognize revenue until products are resold by these distributors to an end customer.

We provide technical and marketing support to our end customers with engineering staff based at our headquarters, product development centers and selected field sales offices. We maintain numerous domestic and international field sales offices in major metropolitan areas.

Export sales as a percentage of our total revenue were 71% in 2004, 68% in 2003 and 60% in 2002. Export sales to Japan were approximately 14% of revenue in 2004, 11% of revenue in 2003 and 8% of revenue in 2002, while export sales to China were 13% of revenue in 2004, slightly less than 10% in 2003, and approximately 6% in 2002. Both export and domestic sales are denominated in U.S. dollars, with the exception of sales to Japan, which are denominated in yen. If our export sales decline significantly there would be a material adverse impact on our business and results of operations.

Our products are sold to a large and diverse group of customers. No individual end customer accounted for more than 10% of total revenue in 2004, 2003 or 2002.

Backlog

Our backlog of scheduled and released orders as of December 31, 2004 was approximately $25.5 million as compared to approximately $45.1 million as of December 31, 2003. This backlog consists of direct customer and distributor orders scheduled for delivery within the next 90 days. Distributor orders accounted for the majority of the backlog in both periods. Direct customer orders may be changed, rescheduled or cancelled under certain circumstances without penalty prior to shipment. Additionally, distributor orders generally may be changed, rescheduled or cancelled without penalty prior to shipment. Furthermore, certain of our distributor shipments are subject to rights of return and price adjustment. Revenue associated with these distributor shipments are not recognized until the product is resold to an end customer. Typically, the majority of our revenue results from orders placed and filled within the same period. Such orders are referred to as “turns orders.” By definition, turns orders are not captured in a backlog measurement made at the beginning of a period. We do not anticipate a significant change in this business pattern. For all these reasons, backlog as of any particular date should not be used as a predictor of revenue for any future period.

Competition

The semiconductor industry is intensely competitive and characterized by rapid rates of technological change, product obsolescence and price erosion. Our current and potential competitors include a broad range of semiconductor companies from emerging companies to large, established companies, many of which have greater financial, technical, manufacturing, marketing and sales resources than we do.

The principal competitive factors in the programmable logic market include product features, price, customer support, and sales, marketing and distribution strength. The availability of competitive software development tools is also critical. In addition to product features such as density, speed, power consumption, reprogrammability, design flexibility and reliability, competition occurs on the basis of price and market acceptance of specific products and technology. We intend to continue to address these competitive factors by working to continually introduce product enhancements and new products, by seeking to establish our products as industry standards in their respective markets, and by working to reduce the manufacturing cost of our products.

We compete directly with Actel Corporation, Altera Corporation and Xilinx Inc., all of whom offer competing products. We also indirectly compete with other semiconductor companies who provide logic

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solutions that are not user programmable. Although to date we have not experienced direct competition from companies located outside the United States, such companies may become a more significant competitive factor in the future. Competition may also increase if other semiconductor companies seek to expand into our market. Any such increases in competition could have a material adverse effect on our operating results.

Patents

We seek to protect our products and technologies primarily through patents, trade secrecy measures, copyrights, mask work protection, trademark registrations, licensing restrictions, confidentiality agreements and other approaches designed to protect proprietary information. There can be no assurance that others may not independently develop competitive technology not covered by our intellectual property rights or that measures we take to protect our technology will be effective.

We hold numerous domestic, European and Asian patents and have patent applications pending in the United States, Asia and Europe. Our current patents will expire at various times between 2005 and 2023. There can be no assurance that pending patent applications or other applications that may be filed will result in issued patents, or that any issued patents will survive challenges to their validity. Although we believe that our patents have value, there can be no assurance that our patents, or any additional patents that may be issued in the future, will provide meaningful protection from competition. We believe that our success will depend primarily upon the technical expertise, experience, creativity and the sales and marketing abilities of our personnel.

Patent and other proprietary rights infringement claims are common in our industry. There can be no assurance that, with respect to any claim made against us, we could obtain a license on terms or under conditions that would not harm our business.

Licenses and Agreements

Advanced Micro Devices

In 1999, as part of our acquisition of Vantis Corporation, a wholly-owned subsidiary of Advanced Micro Devices, Inc. (“AMD”), we entered into an agreement with AMD pursuant to which we have cross-licensed Vantis patents with AMD patents, having an effective filing date on or before June 15, 1999, related to programmable logic products. This cross-license was made on a worldwide, non-exclusive and royalty-free basis. Additionally, as part of our acquisition of Vantis, we acquired certain third-party license rights held by Vantis prior to the acquisition. Included are rights to use certain Xilinx patents to manufacture, market and sell products.

Agere Systems

In 2002, as part of our acquisition of the FPGA business of Agere, we entered into an intellectual property agreement with Agere and Agere Systems Guardian Corporation. Pursuant to this agreement, these Agere companies assigned or licensed to us certain FPGA and FPSC patents, trademarks, software and other intellectual property rights and technology, and we licensed back rights in these same assets. These cross-licenses were made on a worldwide and royalty-free basis.

Altera

In 2001, we entered into a comprehensive, royalty-free patent cross-license agreement and a multi-year patent peace agreement with Altera.

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Fujitsu

On September 10, 2004, we entered into an Advance Payment and Purchase Agreement (the “Fujitsu Agreement”) with Fujitsu Limited (“Fujitsu”), pursuant to which we will advance $125.0 million to Fujitsu in support of the development and construction of a new 300mm wafer fabrication facility in Mie, Japan. The initial two payments of $25.0 million each were made in October 2004 and January 2005, with the remaining payments to be made in two stages upon the achievement of certain milestones. We currently anticipate that the advance payment will be paid in full by the second quarter of 2006.

Our $125.0 million advance will be credited against the purchase price of 300 mm wafers from the new wafer fabrication facility. The Fujitsu Agreement will continue until the full amount of the advance payment has been returned to us in the form of wafers or other repayment, subject to the right of either party to terminate the agreement upon the occurrence of certain events. We may request a refund of the unused amount of the advance payment if we have not used all of our wafer credits by December 31, 2007. The repayment obligation of Fujitsu is unsecured.

Seiko Epson/Epson Electronics America

Epson Electronics America (“EEA”), an affiliated U.S. distributor of Seiko Epson, has agreed to provide us with manufactured wafers in quantities based on six-month rolling forecasts. Prices for the wafers obtained from EEA are reviewed and adjusted periodically. Wafers for our products are manufactured in Japan at Seiko Epson’s wafer fabrication facilities and are delivered to us by EEA.

In 1997 we entered into an advance payment production agreement with Seiko Epson and Epson Electronics America, Inc. (“EEA”) which was subsequently amended in 2002 and March 2004. Under this agreement we advanced $51.3 million to Seiko Epson to finance construction of an eight-inch sub-micron semiconductor wafer manufacturing facility. The advance is to be repaid with semiconductor wafers over a multi-year period. No interest income is recorded. The agreement calls for wafers to be supplied by Seiko Epson through EEA pursuant to purchase agreements with EEA. Cumulatively, $26.2 million of these payments have been repaid to us in the form of semiconductor wafers. We currently estimate that approximately $12.9 million of the outstanding advances are expected to be repaid with semiconductor wafers during the next twelve months and are thus reflected as part of Other current assets in our Consolidated Balance Sheet. We are not obligated to make additional payments under this agreement.

UMC Group

In 1995, we entered into a series of agreements with United Microelectronics Corporation (“UMC”), a public Taiwanese company, pursuant to which we agreed to join UMC and several other companies to form a separate Taiwanese corporation, (“UICC”), for the purpose of building and operating an advanced semiconductor manufacturing facility in Taiwan, Republic of China. Under the terms of the agreements, we invested approximately $49.7 million for an approximate 10% equity interest in the corporation and the right to receive a percentage of the facility’s wafer production at market prices.

In 1996, we entered into an agreement with Utek Corporation (“Utek”), a public Taiwanese company in the wafer foundry business that became affiliated with the UMC group in 1998, pursuant to which we agreed to make a series of equity investments in Utek under specific terms. In exchange for these investments, we received the right to purchase a percentage of Utek’s wafer production. Under this agreement, we invested approximately $17.5 million. In 2000, UICC and Utek merged into UMC.

We owned approximately 60.8 million shares of UMC common stock at December 31, 2004, of which approximately 23.3 million shares are restricted from sale for more than one year by the terms of our agreement with UMC. Under the terms of the UMC agreement, if we sell any of these restricted shares, our rights to guaranteed wafer capacity at UMC may be reduced on a pro-rata basis based on the number

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of shares that we sell. If we sell over 10.1 million of these restricted shares, we may lose all of our rights to guaranteed wafer capacity at UMC.

For financial reporting purposes, all of our UMC shares are accounted for as available-for-sale and marked to market in our Consolidated Balance Sheet until they are sold, at which time a gain or loss is recognized in our Consolidated Statement of Operations. Unrealized gains and losses are included in Accumulated other comprehensive income within Stockholders’ equity. An other than temporary impairment of UMC share value could result in a reduction of the Consolidated Balance Sheet carrying value and would result in a charge to our Consolidated Statement of Operations.

Employees

As of December 31, 2004 we had 1,008 full-time employees. We believe that our future success will depend, in part, on our ability to continue to attract and retain highly skilled technical and management personnel. None of our employees is subject to a collective bargaining agreement. We have never experienced a work stoppage and consider our employee relations to be good.

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EXECUTIVE OFFICERS AND DIRECTORS OF THE REGISTRANT

The following individuals currently serve as our executive officers and directors:

Cyrus Y. Tsui joined Lattice in September 1988 as President and Chief Executive Officer and in March 1991 was named Chairman of the Board. From 1987 until he joined Lattice, Mr. Tsui was Corporate Vice President and General Manager of the Programmable Logic Division of AMD. He was Vice President and General Manager of the Commercial Products Divisions of Monolithic Memories Incorporated (MMI) from 1983 until its merger with AMD in 1987. Mr. Tsui has held technical and managerial positions in the semiconductor industry for over 30 years and has worked in the programmable logic industry since its inception.

Stephen A. Skaggs joined Lattice in December 1992 as Director, Corporate Development. He was elected Senior Vice President, Chief Financial Officer and Secretary in August 1996. In October 2003 he was elected President.

Jan Johannessen rejoined Lattice in October 2001 as Vice President, Investments. In October 2003, he was elected Corporate Vice President and Chief Financial Officer. He originally joined Lattice in 1983 and served as Vice President and Chief Financial Officer between 1987 and 1993. From 1993 to 2001 he worked as an independent venture capitalist.

Frank J. Barone joined Lattice in June 1999 as a Corporate Vice President as a result of our Vantis acquisition. From September 1997 until he joined our company, Mr. Barone was Chief Operating Officer of Vantis. Prior thereto, Mr. Barone held various technical and managerial positions at AMD. He has worked in the programmable logic industry since 1978.

Stephen M. Donovan joined Lattice in October 1989 and served as Director of Marketing and Director of International Sales. He was elected Vice President, International Sales in August 1993. He was promoted to Corporate Vice President, Sales, in May 1998. Mr. Donovan has worked in the programmable logic industry since 1982.

Martin R. Baker joined Lattice in January 1997 as Vice President and General Counsel. From 1991 until he joined Lattice, Mr. Baker held legal positions with Altera Corporation.

Rodney F. Sloss joined Lattice in May 1994 as Vice President, Finance.

David E. Coreson joined our board of directors in February 2005. Mr. Coreson is the former Senior Vice President of Tektronix where his responsibilities included worldwide manufacturing, worldwide

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customer service, central engineering, Tek-Japan, Tek-China and MaxTek, a wholly owned subsidiary of Tektronix which manufactures custom hybrids.

Mark O. Hatfield has been a member of our board of directors since 1997. Mr. Hatfield is a former U.S. Senator from Oregon, a position he held until January 1997. He has served as a Distinguished Professor at Portland State University since 1997, a Distinguished Professor at George Fox University since 1997 and an Adjunct Professor at Lewis & Clark College since 2000.

Daniel S. Hauer has been a member of our board of directors since 1987. Mr. Hauer served as the Chairman of the Board and Chief Executive Officer of Epson Electronics America until November 1998. Since that time, Mr. Hauer has worked as a business consultant.

Patrick S. Jones joined our board of directors in February 2005. Mr. Jones is the former Chief Financial Officer of Gemplus SA and former Vice President, Finance and Corporate Controller of Intel Corporation. He was also previously Chief Financial Officer of LSI Logic Corporation.

Soo Boon Koh joined our board of directors in August 2000. Ms. Koh has served as Managing Partner of iGlobe Partners Fund, L.P., a venture capital firm located in Singapore and the United States, since October 1999. She previously served as Sr. Vice President and Deputy General Manager of Vertex Management Pte., Ltd. until June 1999.

Harry A. Merlo was a founding member of our board of directors in 1983. Mr. Merlo has been the President of Merlo Corporation since July 1995. He was the founding President and previously served as the President and Chairman of the Board of Louisiana-Pacific Corporation until June 1995.

Available Information

We make available free of charge through our website at www.latticesemi.com, via a link to the SEC’s website at www.sec.gov, our annual reports on Form 10-K, quarterly reports on Form 10-Q and current reports on Form 8-K and amendments to those reports as soon as reasonably practicable after such materials are electronically filed with, or furnished to, the SEC. You may also obtain free copies of these materials by contacting our Investor Relations Department at 5555 N.E. Moore Court, Hillsboro, Oregon 97124-6421, telephone (503) 268-8000.

Item 2. Properties.

Our corporate headquarters consists of land and 200,000 square feet of buildings we own in Hillsboro, Oregon. We also own two research and development facilities totaling 29,000 square feet and approximately 6,000 square feet of dormitory facilities in Shanghai, China. We lease a 133,000 square foot research and development facility in San Jose, California through 2008; a 25,000 square foot research and development facility in Austin, Texas through 2011; and a 7,500 square foot research and development facility in the United Kingdom through 2013. We also lease, on a short-term basis, research and development facilities in Colorado, Illinois, Pennsylvania and Utah, and office facilities in multiple metropolitan locations for our domestic and international sales staff. Additionally, we lease (through 2006) an 84,000 square foot facility in Sunnyvale, California that has been subleased to a third party through the end of the lease term. We believe that our existing facilities are adequate for our current and foreseeable future needs.

Item 3. Legal Proceedings.

In September and October 2004, three putative class action complaints were filed in the United States District Court for the District of Oregon against Lattice Semiconductor Corporation, our Chief Executive Officer Cyrus Y. Tsui, and our President Stephen A. Skaggs. These complaints were filed on behalf of a putative class of investors who purchased our stock between April 22, 2003 and April 19, 2004. They

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generally allege violations of federal securities laws arising out of our previously announced restatement of financial results for the first, second, and third quarters of 2003. Consistent with the usual procedures for cases of this kind, these cases were amended and consolidated into a single action. In such amended and consolidated complaint filed January 27, 2005 our former President and our former Controller were added as defendants. We believe that the complaints are without merit, and we intend to vigorously defend against the lawsuits.

In September and October 2004, two shareholder derivative complaints were filed, purportedly on behalf of Lattice Semiconductor Corporation, in the Circuit Court of the State of Oregon for the County of Washington, against all of our current directors, certain former directors, and certain executive officers. The derivative plaintiffs make allegations substantially similar to those in the putative class action complaints, as well as allegations of breach of fiduciary duty, abuse of control, gross mismanagement, waste of corporate assets, and unjust enrichment. Consistent with the usual procedures for cases of this kind, these cases were consolidated into a single putative shareholder derivative action. An amended and consolidated complaint is expected to be filed by April 1, 2005.

All of the complaints generally seek an unspecified amount of damages, as well as attorney fees and costs. The cases are still in the preliminary stages, and it is not possible for us to quantify the extent of our potential liability, if any. An unfavorable outcome in any of these matters could have a material adverse effect on our business and financial results. In addition, defending any litigation may be costly and divert management’s attention from the day-to-day operations of our business.

We are exposed to certain asserted and unasserted potential claims. There can be no assurance that, with respect to potential claims made against us, we could resolve such claims under terms and conditions that would not have a material adverse effect on our business and financial results.

Item 4. Submission of Matters to a Vote of Security Holders.

Not applicable.

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PART II

Item 5. Market for the Registrant’s Common Stock, Related Stockholder Matters, and Issuer Purchases of Equity Securities.

Our common stock is traded on the over-the-counter market and prices are quoted on the Nasdaq National Market under the symbol “LSCC.” The following table sets forth the low and high sale prices for our common stock for the last two fiscal years, as reported by the Nasdaq National Market. As of March 11, 2005, we had approximately 490 stockholders of record.

The payment of dividends on our common stock is within the discretion of our Board of Directors. We intend to retain earnings to finance the growth of our business. We have never paid cash dividends.

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Item 6. Selected Financial Data.

(1)          Includes $3,418, $5,745, $2,962, and $397 of amortization of deferred stock compensation expense for the years ended December 31, 2004, December 31, 2003, December 31, 2002, and December 31, 2001, respectively, attributable to research and development activities.

All share and per share amounts have been adjusted retroactively to reflect a two-for-one stock split effected in the form of a stock dividend paid on October 11, 2000.

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Unaudited Quarterly Data

Item 7. Management’s Discussion and Analysis of Financial Condition and Results of Operations.

Lattice Semiconductor Corporation designs, develops and markets high performance programmable logic products and related software. Programmable logic products are widely-used semiconductor components that can be configured by the end customer as specific logic circuits, and thus enable shorter design cycle times and reduced development costs. Within this market there are two groups of products—programmable logic devices (“PLDs”) and field programmable gate arrays (“FPGAs”)—each representing a distinct silicon architectural approach. Products based on the two alternative programmable logic architectures are generally optimal for different types of logic functions, although many logic functions can be implemented using either architecture. We believe that a substantial portion of programmable logic customers utilize both PLD and FPGA architectures. Our end customers are primarily original equipment manufacturers in the communications, computing, industrial, consumer, automotive, medical and military markets.

Overview of 2004

Revenue for our business in 2004 increased to approximately $225.8 million as compared to approximately $209.7 million in 2003 due to growth of our New* products partially offset by a decline in revenues from Mature* products. There was a decline in business conditions beginning in the third quarter of 2004 which has continued into the first quarter of 2005 attributable to general weakening in the communications end market. Among other things, future revenue growth is dependent on overall economic conditions for our industry and market acceptance of our new FPGA products.

Our gross margin in 2004 and 2003 was 57% for the year. Lower production yields and average selling prices on our new products held margins down below the 60% level achieved in 2002.

Research and development expenses increased to approximately $91.0 million (40% of revenue) in 2004 compared to approximately $87.1 million (41% of revenue) in 2003. Research and development spending is predominantly related to the continued development of next generation FPGA products. We expect to continue to make significant future investments in research and development.

Selling, general and administrative expenses were approximately $53.8 million (24% of revenue) in 2004 as compared to approximately $50.8 million (24% of revenue) in 2003 and increased primarily due to sales commissions and marketing expenses related to new products and increased professional fees primarily related to compliance with the requirements of Section 404 of the Sarbanes-Oxley Act of 2002. To the extent our revenues continue to grow, we expect that there will be a less than proportionate increase in our selling, general and administrative expenses.

Amortization of intangible assets of approximately $47.2 million in 2004 will decline to approximately $16.2 million in 2005 as amortization of intangible assets acquired in the Vantis acquisition was completed in the June 2004 quarter.

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Interest and other income (expense) of approximately $11.4 million in 2004 includes approximately $4.4 million of interest income from marketable securities and cash equivalents, and approximately $8.8 million of gains from the sale of UMC common stock and extinguishment of Zero Coupon Convertible Subordinated Notes due July 1, 2010 partially offset by amortization of issuance costs of Zero Coupon Convertible Subordinated Notes due July 1, 2010. To the extent market conditions allow, we may make similar extinguishments of our Zero Coupon Convertible Subordinated Notes due July 1, 2010 and sales of UMC shares in future quarters.

We are not currently paying federal or state income taxes and do not expect to pay or accrue such taxes in 2005. We expect to continue to pay foreign income taxes at current levels.

* Product classification

Results of Operations

The following table sets forth, for the periods indicated, the percentage of revenue represented by selected items reflected in our Consolidated Statement of Operations:

Acquisitions.   On August 26, 2002, we completed the stock for stock acquisition of Cerdelinx Technologies, Inc. (“Cerdelinx”) for 2.6 million shares of our common stock valued at $8.30 per share. This transaction was accounted for as an asset purchase, and accordingly, the results of operations for Cerdelinx and estimated fair value of assets acquired and liabilities assumed are included in our Consolidated Financial Statements beginning August 26, 2002. In estimating the fair value of the assets acquired, management considered various factors, including an appraisal. In-process research and development (“IPR&D”) costs were appraised at $5.7 million and charged to operations on the acquisition date. Remaining intangible asset costs are being amortized to operations over a period averaging five years. See Note 4 to our Consolidated Financial Statements.

On January 18, 2002, we completed the acquisition of the field-programmable gate array (“FPGA”) business (“Agere FPGA”) of Agere Systems Inc. (“Agere”) for $250 million in cash. This transaction was accounted for as a purchase, and accordingly, the results of operations for Agere FPGA and estimated fair

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value of assets acquired and liabilities assumed are included in our Consolidated Financial Statements beginning January 18, 2002. In estimating the fair value of the assets acquired, management considered various factors, including an appraisal. IPR&D costs were appraised at $24.2 million and charged to operations on the acquisition date. Remaining intangible asset costs are being amortized to operations over 6.3 years. See Note 5 to our Consolidated Financial Statements.

Revenue.   Revenue was $225.8 million in 2004, an increase of 7.7% from 2003. Revenue was $209.7 million in 2003, a decrease of 8.5% from 2002 revenue of $ 229.1 million. The composition of our revenue by product family for the years presented was as follows:

Prior to the acquisition of Agere FPGA, we had no revenue from FPGA products.

The increase in revenue in 2004 as compared to 2003 was primarily due to growth of our product sales in Asia attributable to stronger business conditions offset in part by a decline in business conditions beginning in the third quarter of 2004 attributable to general weakening in the communications end market. During 2003, our revenue was adversely affected by the business downturn experienced by the semiconductor and programmable logic markets that began in 2001, offset in part by a general business recovery experienced late in 2003.

Revenue from export sales as a percentage of total revenue was approximately 71% for 2004, 68% for 2003, and 60% for 2002. We expect export sales to continue to represent a significant portion of revenue.

Our sales by geographic region were as follows (in thousands):

During 2004, total units sold increased by 10% while overall average selling prices declined by 3% when compared to 2003. The 2004 increase in units sold is attributable to sales of New* products while the decrease in average selling prices is attributable to lower selling prices of Mature* products. Average selling prices of Mainstream* products increased by 4% in 2004 compared to 2003 while units sold were flat. From a product line viewpoint, in 2004 there was a 36% increase in FPGA units sold, partially offset by a 15% decrease in average selling prices when compared to 2003. For PLD products in 2004, units sold increased 10% while average selling prices decreased by 3% when compared to 2003. During 2003, total units sold and our overall average selling prices both decreased by approximately nine percent when compared to 2002. In 2003, both units sold and average selling price were adversely impacted by the business downturn in the semiconductor and programmable logic markets that began in 2001. Our ability to maintain or increase the level of our average selling price is dependent on the continued development, introduction and market acceptance of new products. See “Factors Affecting Future Results.”

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Gross Margin.   Our gross margin percentage was 57% for 2004 and 2003, and 60% for 2002. Similar margins in 2004 compared to 2003 reflect the growth of sales of New* products, that currently carry lower margins, offset by higher margins in Mature* products that declined in revenue in 2004. The decrease in gross margin percentage in 2003 compared to 2002 was primarily attributable to a provision for an allowance for price protection and sales returns for distributors in the September 2003 quarter. To a lesser extent, this decrease in gross margin also reflects the increased proportion of fixed manufacturing costs as a result of lower revenue levels in 2003.

Research and Development.   Research and development expense was $91.0 million for 2004 compared to $87.1 million for 2003 and $85.8 million in 2002. Research and development expenses consist primarily of personnel, masks, prototype wafers, third-party design automation software, assembly tooling and qualification expenses. The increases in 2004 and 2003 when compared to the prior year were primarily due to the continued development of new products, including especially engineering mask costs. We believe that a continued commitment to research and development is essential in order to maintain product leadership and provide innovative new product offerings, and therefore we expect to continue to make significant future investments in research and development. As we continue to move to more advanced process technologies such as 130nm, 90nm and beyond, mask costs are becoming increasingly more expensive and will therefore increasingly represent a greater proportion of total research and development expenses.

Selling, General and Administrative.   Selling, general and administrative expense was $53.8 million in 2004, $50.8 million in 2003, and $48.1 million in 2002. The 2004 increase compared to 2003 was primarily due to the increase in sales commissions and marketing expenses related to new products and increased professional and legal fees related to initial compliance with the requirements of Section 404 of the Sarbanes-Oxley Act of 2002. The increase in 2003 when compared to 2002 was primarily due to increased marketing expense related to new products and increased professional fees including those related to the restatement of the first, second and third quarter 2003 financial statements.

In-Process Research and Development.   IPR&D consisted of those products obtained through acquisition that were not yet proven to be technologically feasible but had been developed to a point where there was value associated with them in relation to potential future revenue. Because technological feasibility was not yet proven and no alternative future uses were believed to exist for the in-process technologies, the assigned value was expensed immediately upon the closing date of the acquisitions. IPR&D recorded in 2002 resulted from the completion of the Agere FPGA and Cerdelinx acquisitions described below:

Cerdelinx

The fair value underlying the $5.7 million assigned to acquired IPR&D from the Cerdelinx acquisition (recognized in the third quarter of 2002) was determined by identifying research projects in areas for which technological feasibility had not been established and there were no alternative future uses. The acquired IPR&D consisted of low-power CMOS transceivers and backplane interfaces with embedded high-speed SERDES I/O. These projects were approximately 60% complete and were estimated to be completed in 2003 at an estimated cost of approximately $2.0 million. During 2004, new products based on this technology were completed. In addition, this technology along with subsequently developed technology is being integrated into other new products expected to be completed in 2005. There has been no material change in the estimated cost of these projects.

The fair value was determined by an income approach where fair value is the present value of projected free cash flows that will be generated by the products incorporating the acquired technologies under development, assuming they are successfully completed. The estimated net free cash flows generated by the products over six year periods were discounted at rates ranging from 15% to 17% in

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relation to the stage of completion and the technical risks associated with achieving technological feasibility. The net cash flows for such projects were based on management’s estimates of revenue, expenses and asset requirements.

The remaining portion of these projects has completion risk related to silicon functionality, architecture performance, packaging technology, continued availability of key technical personnel and product reliability. To the extent that estimated completion dates are not met, the risk of competitive product introduction is greater and revenue opportunity may be permanently lost.

Agere FPGA

The fair value underlying the $24.2 million assigned to acquired IPR&D in the Agere FPGA acquisition was determined by identifying research projects in areas for which technological feasibility had not been established and there was no alternative future use. Projects in the IPR&D category were the ORCA 4 FPGA family, the next generation FPGA family and the FPSC field-programmable system chips. The following is a brief description of these projects. The ORCA 4 FPGA family project, increasing speed and density and enhancing yields, was approximately 85% complete and estimated to be completed by 2003 at an estimated cost of $1.5 million. This project was completed during 2002 with no material change in cost. The next generation FPGA family project, increasing speed and density while reducing die size, was approximately 50% complete and estimated to be completed by 2004 at an estimated cost of $2.0 million. This project was significantly redefined and is now expected to be completed during 2005. The future development of FPSC field-programmable system chips was approximately 25% to 90% complete, and estimated to be completed by 2004 at an estimated cost of $2.0 million. This project was completed during 2004 with no material change in cost.

The IPR&D value of $24.2 million was determined by an income approach where fair value is the present value of projected free cash flows that will be generated by the products incorporating the acquired technologies under development, assuming they are successfully completed. The estimated net free cash flows generated by the products over 5-7 year periods were discounted at rates ranging from 23% to 25% in relation to the stage of completion and the technical risks associated with achieving technological feasibility. The net cash flows for such projects were based on management’s estimates of revenue, expenses and asset requirements. Any delays or failures in the completion of these projects could impact our expected return on investment and future results. In addition, our financial condition would be adversely affected if the value of other intangible assets acquired became impaired.

The remaining project has completion risks related to silicon functionality, architecture performance, packaging technology, continued availability of key technical personnel and product reliability. To the extent that estimated completion dates are not met, the risk of competitors’ product introductions is greater and revenue opportunity may be permanently lost.

Amortization of Intangible Assets.   Amortization of intangible assets is related to our 2002 acquisitions, discussed above, our 1999 Vantis acquisition and our 2001 acquisition of Integrated Intellectual Property, Inc. (“I2P”). Amortization expense was $47.2 million in 2004, $77.1 million in 2003, and $73.4 million in 2002. The decrease in amortization expense in 2004 was attributable to intangible assets from the Vantis acquisition which were fully amortized during 2004. The increase in amortization for 2003 when compared with 2002 was due to a full year of amortization of intangible assets related to our 2002 acquisitions, and approximately $2.2 million incremental amortization of deferred stock compensation in association with the accelerated write-off of accrued deferred compensation recorded in conjunction with certain assumed in-the-money stock options as part of a stock option exchange program completed during the first quarter of 2003 (see Note 13 to our Consolidated Financial Statements).

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Interest Income.   Interest income was $4.4 million in 2004, $3.6 million in 2003 and $5.4 million in 2002. The increase in 2004 when compared to 2003 is attributable to higher balances and interest rates. The decrease in 2003 when compared to 2002 was due to lower interest rates on invested balances.

Interest Expense.   Interest expense was insignificant in 2004, $7.1 million in 2003, and $12.6 million in 2002. Substantially all interest expense resulted from the debt issued to partially fund our Vantis acquisition. The decrease in 2004 when compared to 2003 and in 2003 when compared to 2002 was due to the extinguishment of our remaining 43¤4% Convertible Subordinated Notes in July 2003. (See Note 12 to our Consolidated Financial Statements).

Other Income, net.   Other income, net, was $7.0 million in 2004, $0.4 million in 2003, and $13.4 million in 2002. For 2004, Other income, net, consists of a $6.1 million gain on sale of UMC shares and a $2.8 million gain on extinguishment of Zero Coupon Convertible Subordinated Notes due 2010 net of $1.9 million amortization of convertible note issuance costs and other costs. For 2003, Other income, net, consists of $1.4 million of gain recorded on the partial extinguishment of our Zero Coupon Convertible Subordinated Notes due 2010, substantially offset by the $4.7 million call premium associated with the extinguishment of our 43¤4% Convertible Subordinated Notes (see Note 12 to our Consolidated Financial Statements). For 2002, the amount recorded consists primarily of a $9.3 million gain in conjunction with the extinguishment of a portion of our 43¤4% Convertible Subordinated Notes (see Note 12 to our Consolidated Financial Statements), and a $4.0 million gain in conjunction with the sale of a portion of our UMC shares (see Note 7 to our Consolidated Financial Statements).

Provision (Benefit) for Income Taxes.   The 2004 tax provision is related to income taxes on our foreign subsidiaries primarily engaged in selling and research and development activities. The tax benefit in 2003 is primarily a result of releasing $3.4 million of tax reserves as the related statute of limitations expired and a $2.5 million refund of Federal income taxes. The provision for income taxes for 2002 of $81.9 million is primarily the result of a $118.6 million charge to income tax expense recorded in the fourth quarter of 2002, representing a full valuation allowance for our recorded deferred tax assets (see Note 11 to our Consolidated Financial Statements).

Critical Accounting Policies and Estimates

Critical Accounting Policies are those that are both most important to the portrayal of a company’s financial condition and results, and require management’s most difficult, subjective and complex judgments, often as a result of the need to make estimates about the effect of matters that are inherently uncertain. A description of our critical accounting policies follows.

Use of Estimates.   The preparation of financial statements in conformity with generally accepted accounting principles requires management to make estimates and assumptions that affect the reported amounts of assets, such as accounts receivable, inventory and deferred income taxes and liabilities, such as accrued liabilities, income taxes and deferred income, disclosure of contingent assets and liabilities at the date of the financial statements and the reported amounts of revenues and expenses during the fiscal periods presented. Actual results could differ from those estimates.

Revenue recognition.   Revenue from direct customers is recognized upon shipment provided that persuasive evidence of a sales arrangement exists, the price is fixed and determinable, title has transferred, collection of resulting receivables is probable, there are no customer acceptance requirements and no remaining significant obligations. Certain of our sales are made to distributors under agreements providing price protection and right of return on unsold merchandise. Revenue and costs relating to such distributor sales are deferred until the product is sold by the distributor and related revenue and costs are then reflected in income.

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Our method of revenue recognition for deferred distributor sales is based on certain assumptions including our average collection experience compared to resale reported by the distributors. To the extent actual results differ from these assumptions, revenue will change accordingly.

Deferred income.   In determining the balance in the deferred income account, we make estimates of salable and returnable inventory at certain distributors and we make estimates similar to those used to value inventory on hand to value inventory at these distributors. To the extent actual results differ from these estimates, the balances of reported deferred income, revenue and cost of products sold will change accordingly.

Inventory.   We value inventory at the lower of cost or market on a quarterly basis. In addition, we write down unproven, excess and obsolete inventories to net realizable value. To value our inventory, we make a number of estimates and assumptions including future price declines and forecasted demand for our products. To the extent actual results differ from these estimates and assumptions, the balances of reported inventory and cost of products sold will change accordingly.

Long-Lived Assets.   We account for our long-lived assets, primarily property and equipment and amortizable intangible assets, in accordance with Statement of Financial Accounting Standards (“SFAS”) No. 144, “Accounting for the Disposal of Long-Lived Assets,” which requires us to review the impairment of long-lived assets whenever events or changes in circumstances indicate that the carrying amount of an asset may not be recoverable. Impairment is determined by comparing the estimated undiscounted cash flows to the carrying amount. A loss is recorded if the carrying amount of the asset exceeds the estimated undiscounted cash flows. Intangible assets are generally being amortized over five years, and fifteen years for income tax purposes, on a straight-line basis.

Accounting for income taxes.   To report income tax expense related to operating results, we record current and deferred income tax assets and liabilities in our balance sheet. In determining the value of our deferred tax assets, we make estimates of future taxable income. As of December 31, 2004, 2003 and 2002, we have recorded full valuation allowances for all of our deferred tax assets due to uncertainties regarding their realization. In determining the value of income tax liabilities, we make estimates of the results of future examinations of our income tax returns by taxing authorities. To the extent actual results differ from these estimates, our income tax provision will be affected accordingly.

Liquidity and Capital Resources

As of December 31, 2004, our principal source of liquidity was $296.3 million of cash and marketable securities, which was approximately $18.5 million greater than the balance of $277.8 million at December 31, 2003. Working capital decreased to $328.5 million at December 31, 2004 from $363.6 million at December 31, 2003. This decrease was primarily due to payments to Fujitsu pursuant to the Advance Payment Agreement entered into in September 2004. During 2004 we generated approximately $6.0 million of cash and cash equivalents from our operations, net of a $25.0 million payment to Fujitsu Limited (discussed below), compared with $34.8 million during 2003, of which approximately $26.0 million was attributable to income tax refunds.

Accounts Receivable declined $7.2 million at December 31, 2004 compared to December 31, 2003 due to lower billings in the later portion of the fourth quarter of 2004 as compared to the similar period in 2003 combined with lower revenues in the December 2004 quarter compared to the December 2003 quarter.

Inventories decreased approximately $8.0 million, or 17%, at December 31, 2004 compared to December 31, 2003 and decreased by $9.6 million, or 17%, at December 31, 2003 as compared to the balance at the end of the prior year primarily due to reduced starts and receipts of wafers in response to changing revenue levels.

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Prepaid expenses and other current assets increased by approximately $6.2 million in December 31, 2004 as compared to December 31, 2003 primarily due to: increased amounts of prepaid wafers expected to be used in the next twelve months (see Note 7 to our Consolidated Financial Statements); increases in prepaid software licenses, maintenance contracts and insurance; and additional income tax refunds receivable. Prepaid expenses and other current assets decreased by approximately $18.9 million, or 54%, at December 31, 2003 as compared to December 31, 2002 primarily due to a decrease in refundable income taxes, offsetting an approximate $6.2 million increase in the amount of prepaid wafers expected to be used in the next twelve months (see Note 7 to our Consolidated Financial Statements).

The current portion of equity securities available for sale decreased from $35.4 million to $24.2 million at December 31, 2004 as compared to December 31, 2003. These securities represent the portion of our investment in UMC that are available for sale during 2005 (see Note 7 to our Consolidated Financial Statements). The current portion of equity securities available for sale increased by $35.4 million, or 100%, at December 31, 2003 as compared to December 31, 2002.

Property and equipment, less accumulated depreciation, decreased by $6.2 million at December 31, 2004 as compared to December 31, 2003 and decreased by $9.0 million in 2003 as compared to the balance in the prior year due to lower expenditures for capital equipment. Net intangible assets decreased by $43.8 million and $71.3 million in 2004 and 2003 as compared to the balance of the prior year, respectively, which is attributable to amortization of these assets.

Capital expenditures were approximately $10.7 million, $9.7 million, and $17.5 million in 2004, 2003 and 2002, respectively. We expect to spend approximately $15 million to $20 million on capital expenditures for the fiscal year ended December 31, 2005.

Foundry investments, advances and other assets increased by approximately $11.0 million at December 31, 2004 compared to December 31, 2003 due to a $50.0 million recorded advance for wafer supply to Fujitsu (see Note 7 to our Consolidated Financial Statements) partially offset by a decline in our UMC investment due to $36.6 million of shares sold and a $13.2 million market price decline. Foundry investments, advances and other assets decreased by approximately $17.6 million, or 17%, at December 31, 2003 as compared to the balance of the prior year. This was primarily due to the $35.4 million of our UMC investment reclassified to equity securities available for sale and the $6.2 million reclassified to prepaid expenses and other current assets related to prepaid wafers, partially offset by a $24.6 million gain recorded in accumulated other comprehensive income related to changes in the market value of our UMC shares.

As of December 31, 2004, we owned 60.8 million shares of UMC common stock of which 23.3 million shares were restricted from sale for more than one year by the terms of our agreement with UMC. During 2002, we sold approximately 7.6 million shares of UMC common stock for approximately $9.9 million in cash, resulting in a gain of $4.0 million. During 2004, we sold 36.6 million of our UMC shares for approximately $29.6 million in cash, resulting in a gain of approximately $6.1 million. In the future, we may choose to liquidate additional UMC shares.

In 1997 we entered into an advance payment production agreement with Seiko Epson and Epson Electronics America, Inc. (“EEA”), which was subsequently amended in 2002 and March 2004. Under this agreement we advanced $51.3 million to Seiko Epson to finance construction of an eight-inch sub-micron semiconductor wafer manufacturing facility. The advance is to be repaid with semiconductor wafers over a multi-year period. No interest income is recorded. The agreement calls for wafers to be supplied by Seiko Epson through EEA pursuant to purchase agreements with EEA. Cumulatively, $26.2 million of these payments have been repaid to us in the form of semiconductor wafers. We currently estimate that approximately $12.9 million of the outstanding advances are expected to be repaid with semiconductor wafers during the next twelve months and are thus reflected as part of Other current assets in our Consolidated Balance Sheet. We are not obligated to make additional payments under this agreement.

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On June 20, 2003, we issued $200.0 million in Zero Coupon Convertible Subordinated Notes due July 1, 2010. No interest will accrue or be payable related to these notes. Holders of these notes may convert the notes into shares of our common stock at any time before the close of business on the date of their maturity, unless the notes have been previously redeemed or repurchased, if (1) the price of our common stock issuable upon conversion of a note reaches a specified threshold, (2) the notes are called for redemption, (3) if we request a redemption, or make a distribution to common stockholders that is dilutive to note holders or if we become a party to a merger or consolidation or sale of substantially all of our assets or (4) the trading price of the notes falls below certain thresholds. The conversion price is approximately $12.06 per share, subject to adjustment in certain circumstances. On or after July 1, 2008, we have the option to redeem all or a portion of the notes that have not been previously repurchased or converted at 100% of the principal amount of the notes. On July 1, 2008, holders have the option to require us to purchase all or a portion of their notes in cash at 100% of the principal amount of the notes. Holders also have the right, subject to certain conditions, to require us to repurchase the notes in the event of a “fundamental change” (as defined in the indenture governing the notes) at 100% of the principal amount of the notes. Generally, a fundamental change is an occurrence resulting in substantially all of our common stock being converted into common stock which is not listed on a United States stock exchange or Nasdaq.

The notes are subordinated in right of payment to all of our senior indebtedness, and are structurally subordinated as to the revenues and assets of our subsidiaries to all debt and other liabilities of our subsidiaries. At December 31, 2004, we had no senior indebtedness and our subsidiaries had approximately $2.2 million of debt and other liabilities outstanding. Issuance costs relative to these convertible notes are included in “Foundry investments, advances and other assets” and aggregated approximately $5.4 million and are being amortized to expense over the lives of the notes. Accumulated amortization of these issuance costs was approximately $3.2 million and $1.4 million as of December 31, 2004 and December 31, 2003, respectively.

In October 2003, our board of directors authorized management to repurchase up to $100.0 million of our Zero Coupon Convertible Subordinated Notes due July 1, 2010. During 2004, we extinguished approximately $15.0 million of these notes for approximately $12.0 million in cash and recognized a net gain of approximately $2.8 million after writing off approximately $0.2 million of unamortized issuance costs. During 2003, we extinguished approximately $16.0 million of these notes for approximately $14.2 million in cash and recognized a net gain of approximately $1.4 million. In connection with this transaction, we also wrote off approximately $0.4 million of unamortized issuance costs. In the first quarter through March 11, 2005 we extinguished $5.3 million of our Zero Coupon Convertible Subordinated Notes due July 1, 2010 for $4.5 million resulting in a gain of $0.7 million which will be included in Interest and other income (expense) for the March 31, 2005 quarter. In the future we may choose to extinguish additional Zero Coupon Convertible Subordinated Notes due July 1, 2010.

The estimated fair value of the Zero Coupon Convertible Subordinated Notes due July 1, 2010, based on quoted market prices, was approximately $145.1 million at December 31, 2004.

On July 21, 2003, we extinguished for cash all of our outstanding 43¤4% Convertible Subordinated Notes due in 2006, originally issued in October 1999, plus accrued interest. Total cash paid at extinguishment approximated $178.8 million, including par value of $172.3 million, accrued interest of approximately $1.8 million and a call premium of 2.71% of the outstanding notes, or approximately $4.7 million. This call premium, plus unamortized issuance costs of approximately $1.0 million as of the extinguishment date, was recorded as “Other expense” in the quarter ended September 30, 2003.

During 2002, we extinguished approximately $51.9 million face value of our 43¤4% Convertible Subordinated Notes due in 2006 for approximately $42.8 million in cash, including accrued interest. We recognized a net gain of approximately $9.3 million in connection with these transactions.

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On September 10, 2004, we entered into an Advance Payment and Purchase Agreement (the “Fujitsu Agreement”) with Fujitsu Limited (“Fujitsu”), pursuant to which we will advance $125.0 million to Fujitsu in support of the development and construction of a new 300mm wafer fabrication facility in Mie, Japan. The initial two payments of $25.0 million each were made in October 2004 and January 2005, with the remaining payments to be made in two stages upon the achievement of certain milestones. We currently anticipate that the advance payment will be paid in full by the second quarter of 2006.

Our $125.0 million advance will be credited against the purchase price of 300 mm wafers from the new wafer fabrication facility. The Fujitsu Agreement will continue until the full amount of the advance payment has been returned to us in the form of wafers or other repayment, subject to the right of either party to terminate the agreement upon the occurrence of certain events. We may request a refund of the unused amount of the advance payment if we have not used all of our wafer credits by December 31, 2007. The repayment obligation of Fujitsu is unsecured.

The foregoing summary description of the Fujitsu Agreement is qualified in its entirety by reference to the Fujitsu Agreement, which is filed as an exhibit to our Form 10Q for the quarter ended September 30, 2004.

The following table summarizes our significant contractual cash obligations at December 31, 2004 (in thousands):

(1)          Certain of our facilities and equipment are leased under operating leases, which expire at various times through 2013. Rental expense under the operating leases was approximately $5.9 million, $5.8 million, and $6.0 million for 2004, 2003 and 2002, respectively.

(2)          We depend entirely upon subcontractors to manufacture our silicon wafers. Other subcontractors provide substantially all of our assembly and test services. Due to lengthy subcontractor lead times, we must order these materials and services well in advance, and we are obligated to pay for these materials and services once they are completed. We expect to receive the material and pay the purchase obligation within four to six months subsequent to December 31, 2004.

(3)          Represents obligations to make payments upon completion of milestones presently estimated to occur by the second quarter of 2006.

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Included in the above operating lease amounts are certain properties which are currently subleased. A portion of this sublease income is payable to the property owner. Future minimum sublease receipts, based on agreements in place at December 31, 2004, net of such payments are as follows (in thousands):

In December 2000, our Board of Directors authorized management to repurchase up to five million shares of our common stock. As of December 31, 2004, we had repurchased 1,136,000 shares at an aggregate cost of approximately $20.0 million. There were no repurchases of common stock in 2002, 2003 or 2004.

Congress adopted the American Jobs Creation Act of 2004 which among other things provides companies with foreign subsidiaries the opportunity to repatriate earnings of such subsidiaries at a reduced tax rate. Presently we have substantial tax loss carryforwards which could be used to offset tax liabilities arising from repatriation of foreign subsidiary earnings. We are not planning to repatriate earnings of our foreign subsidiaries.

We believe that our existing liquid resources and expected cash generated from operations combined with our ability to borrow additional funds will be adequate to meet our operating and capital requirements and obligations for the next 12 months. We may in the future seek new or additional sources of funding. In addition, in order to secure additional wafer supply, we may from time to time consider various financial arrangements including joint ventures, equity investments, advance purchase payments, loans, or similar arrangements with independent wafer manufacturers in exchange for committed wafer capacity. To the extent that we pursue any such additional financing arrangements, additional debt or equity financing may be required. There can be no assurance that such additional financing will be available when needed or, if available, will be on favorable terms. Any future equity financing will decrease existing stockholders’ equity percentage ownership and may, depending on the price at which the equity is sold, result in dilution.

New Accounting Pronouncements

In March 2004, the Emerging Issues Task Force reached a consensus on recognition and measurement guidance previously discussed under EITF 03-01. The consensus clarifies the meaning of other-than-temporary impairment and its application to investments classified as either available-for-sale or held-to-maturity under SFAS No. 115, “Accounting for Certain Investments in Debt and Equity Securities.” The recognition and measurement guidance for which the consensus was reached in the March 2004 meeting is to be applied to other-than-temporary impairment evaluations in reporting periods beginning after June 15, 2004. In November 2004, the FASB staff indicated that the FASB will delay until 2005 the FASB Staff Position on EITF Issue No. 03-01, “The Meaning of Other-Than-Temporary Impairment and its Application to Certain Investments.” Management will evaluate the affect of adopting the recognition and measurement guidance when the matter is finalized.

In December 2004, the FASB issued a Statement “Share Based Payment—a revision of SFAS No. 123 ‘Accounting for Stock Based Compensation’,” that addresses the accounting for share-based payment transactions in which a company receives employee services in exchange for either equity instruments of the company or liabilities that are based on the fair value of the company’s equity instruments or that may be settled by the issuance of such equity instruments. The statement eliminates the ability to account for share-based compensation transactions using the intrinsic method currently used by the company and generally would require that such transactions be accounted for using a fair-value-based method and

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recognized as expense in the company’s Consolidated Statement of Operations. The effective date of the standard is for interim or fiscal periods beginning after June 15, 2005. This statement will have a significant impact on our Consolidated Statement of Operations, as we will be required to expense the fair value of our stock option grants and stock purchases under our employee stock purchase plan. At this time we have not made an estimate of the impact of this statement on our future financial results. Please refer to Note 13 to our Consolidated Financial Statements which provides historical information that may be useful in assessing the impact of this standard on our Consolidated Financial Statements.

Off-Balance Sheet Arrangements

We do not have any financial partnerships with unconsolidated entities, such as entities often referred to as structured finance or special purpose entities, which are often established for the purpose of facilitating off-balance sheet arrangements or other contractually narrow or limited purpose. Accordingly, we are not exposed to any financing, liquidity, market or credit risk that could arise if we had such relationships.

Factors Affecting Future Results

We may be unsuccessful in defining, developing or selling new products required to maintain or expand our business.

As a semiconductor company, we operate in a dynamic environment marked by rapid product obsolescence. Our future success depends on our ability to introduce new or improved silicon and software products that meet customer needs while achieving acceptable margins. We are presently in the process of releasing next generation FPGA product families that are critical to our ability to address the FPGA segment of the programmable logic market. If we fail to introduce these, or other, new products in a timely manner or such products fail to achieve market acceptance, our operating results would be harmed.

Fujitsu Limited has agreed to manufacture our next generation FPGA products on its 130 nanometer and 90 nanometer CMOS process technologies, as well as on a 130 nanometer technology with embedded Flash memory that we have jointly developed with Fujitsu. The success of our next generation FPGA products is dependent on our ability to successfully partner with Fujitsu, which has not previously manufactured any of our products. If for any reason we are unsuccessful in our efforts to partner with Fujitsu in connection with these next generation FPGA products, our future revenue growth would be materially adversely affected.

The introduction of new silicon and software products in a dynamic market environment presents significant business challenges. Product development commitments and expenditures must be made well in advance of product sales. The market reception of new products depends on accurate projections of long-term customer demand, which by their nature are uncertain.

Our future revenue growth is dependent on market acceptance of our new silicon and software product families and the continued market acceptance of our current products. The success of these products is dependent on a variety of specific technical factors including:

·       successful product definition;

·       timely and efficient completion of product design;

·       timely and efficient implementation of wafer manufacturing and assembly processes;

·       product performance;

·       product cost; and

·       the quality and reliability of the product.

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If, due to these or other factors, our new silicon and software products do not achieve market acceptance, our operating results would be harmed.

Our products may not be competitive if we are unsuccessful in migrating our manufacturing processes to more advanced technologies or alternative fabrication facilities.

To develop new products and maintain the competitiveness of existing products, we need to migrate to more advanced wafer manufacturing processes that use larger wafer sizes and smaller device geometries. We also may need to use additional foundries. Because we depend upon foundries to provide their facilities and support for our process technology development, we may experience delays in the availability of advanced wafer manufacturing process technologies at existing or new wafer fabrication facilities. As a result, volume production of our advanced process technologies at the fabs of Seiko Epson, UMC, Chartered Semiconductor, Fujitsu or future foundries may not be achieved. This could harm our operating results.

The cyclical nature of the semiconductor industry may limit our ability to maintain or increase revenue levels and operating results during industry downturns.

The semiconductor industry is highly cyclical, to a greater extent than other less technology-driven industries. Our financial performance has periodically been negatively affected by downturns in the semiconductor industry. Factors that contribute to these industry downturns include:

·       the cyclical nature of the demand for the products of semiconductor customers;

·       general reductions in inventory levels by customers;

·       excess production capacity;

·       general decline in end-user demand; and

·       accelerated declines in average selling prices.

Historically, the semiconductor industry has experienced periodic downturns of varying degrees of severity and duration. Typically, after such downturns, semiconductor industry conditions improve, although such improvement may not be significant or sustainable. Increased demand for semiconductor industry products may not proportionately increase demand for programmable logic products in general, or our products in particular. Even if demand for our products increases, average sales prices for our products may not increase, and could decline. Whenever adverse semiconductor industry conditions or other similar conditions exist, there is likely to be an adverse effect on our operating results.

A downturn in the communications equipment and computing end markets could cause a reduction in demand for our products and limit our ability to maintain or increase revenue levels and operating results.

The majority of our revenue is derived from customers in the communications equipment and computing end markets. Any deterioration in these end markets or any reduction in technology capital spending could lead to a reduction in demand for our products. Whenever adverse economic or end market conditions exist, there is likely to be an adverse effect on our operating results.

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We face risks related to implementation of new Sarbanes-Oxley Section 404 Controls Audit requirements.

Section 404 of the Sarbanes-Oxley Act of 2002 requires that our management assess our internal control over financial reporting annually and include a report on its assessment in our annual report. Our independent registered public accounting firm is required to audit both the design and operating effectiveness of our internal controls and management’s assessment of the design and the operating effectiveness of its internal controls. Through its assessment process, management believes there are no known material weaknesses at this time. This is the first year we have undergone an audit of our internal controls and procedures. We will continue to perform similar assessments and it is possible that material weaknesses will be found and reported to our shareholders in the future. Further, if we are unable to remediate any such weaknesses our independent registered public accounting firm may issue an adverse opinion on our internal controls. If this were to occur, particularly in light of our restatement of 2003 quarterly financial statements, investor confidence regarding our internal controls could be harmed and our stock price could decline.

We face risks related to our recent accounting restatement.

On January 22, 2004, we announced that we had discovered possible accounting inaccuracies in previously reported quarterly financial statements. An internal investigation was conducted by the Audit Committee of our Board of Directors to determine the scope and magnitude of these inaccuracies. On March 24, 2004, we announced that the Audit Committee had completed its internal accounting investigation and, as a result, we restated our financial statements for the first, second and third quarters of 2003 to correct inappropriate accounting entries and a failure to record a change in accounting estimate related to deferred income. On April 19, 2004, we filed such restated financial statements with Form 10Q/A for the affected quarters.

The restatement of these financial statements has led to litigation claims and may lead to further litigation claims and/or regulatory proceedings against us. The defense of any such claims or proceedings may cause the diversion of management’s attention and resources, and we may be required to pay damages if any such claims or proceedings are not resolved in our favor. Any litigation or regulatory proceeding, even if resolved in our favor, could cause us to incur significant legal and other expenses. Moreover, we may be the subject of negative publicity focusing on the financial statement inaccuracies and resulting restatement. The occurrence of any of the foregoing could harm our business and reputation and cause the price of our common stock to decline.

If we are unable to effectively and efficiently implement our plan to improve our internal controls there could be a material adverse effect on our operations or financial results.

We received notice from our independent registered public accounting firm that, in connection with the 2003 year-end audit, the independent registered public accounting firm identified a material weakness in our internal controls and procedures relating to separation of duties and establishment of standards for review of journal entries and related file documentation. Although we have implemented various initiatives that have remedied this material weakness, we intend to make additional changes to our internal controls to address the issues that gave rise to the material weakness.

During our 2004 fiscal year end financial statement closing we identified a significant deficiency in our internal controls relating to a mechanical error in calculating a unique inventory allowance, which resulted from manual calculations performed by newly assigned employees who did not recognize that the required allowance had been calculated and recorded by existing procedures. The error was not present in previously issued financial statements and was corrected before the current fiscal year end financial statements were issued. Additional training and review procedures have been instituted to remedy this situation. During 2005 we intend to perform more staff training and staff cross training as well as identify

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ways to modify and automate our inventory compilation processes to make them less vulnerable to manual errors and implement related procedures.

No assurance can be given that we will be able to successfully implement our revised internal controls and procedures or that our revised controls and procedures will have the desired effect. In addition, we may be required to hire additional employees, and may experience higher than anticipated capital expenditures and operating expenses, during the implementation of these changes and thereafter. Furthermore, future assessments of our internal controls and procedures may reveal new material weaknesses or significant deficiencies. If we are unable to implement the changes to our internal controls and procedures effectively or efficiently, or if we discover additional material weaknesses or significant deficiencies, there could be a material adverse effect on our operations or financial results. Moreover, we could be subject to additional regulatory oversight and our business and reputation could be harmed.

We face risks related to pending litigation.

In September and October 2004, three putative class action complaints were filed in the United States District Court for the District of Oregon against Lattice Semiconductor Corporation, our Chief Executive Officer Cyrus Y. Tsui, and our President Stephen A. Skaggs. These complaints were filed on behalf of a putative class of investors who purchased our stock between April 22, 2003 and April 19, 2004. They generally allege violations of federal securities laws arising out of our previously announced restatement of financial results for the first, second, and third quarters of 2003. Consistent with the usual procedures for cases of this kind, these cases were amended and consolidated into a single action. In such amended and consolidated complaint filed January 27, 2005 our former President and our former Controller were added as defendants. We believe that the complaints are without merit, and we intend to vigorously defend against the lawsuits.

In September and October 2004, two shareholder derivative complaints were filed, purportedly on behalf of Lattice Semiconductor Corporation, in the Circuit Court of the State of Oregon for the County of Washington, against all of our current directors, certain former directors, and certain executive officers. The derivative plaintiffs make allegations substantially similar to those in the putative class action complaints, as well as allegations of breach of fiduciary duty, abuse of control, gross mismanagement, waste of corporate assets, and unjust enrichment. Consistent with the usual procedures for cases of this kind, these cases were consolidated into a single putative shareholder derivative action. An amended and consolidated complaint is expected to be filed by April 1, 2005.

All of the complaints generally seek an unspecified amount of damages, as well as attorney fees and costs. The cases are still in the preliminary stages, and it is not possible for us to quantify the extent of our potential liability, if any. An unfavorable outcome in any of these matters could have a material adverse effect on our business and financial results. In addition, defending any litigation may be costly and divert management’s attention from the day-to-day operations of our business.

We are exposed to certain asserted and unasserted potential claims. There can be no assurance that, with respect to potential claims made against us, we could resolve such claims under terms and conditions that would not have a material adverse effect on our business and financial results.

Our future quarterly operating results may fluctuate and therefore may fail to meet expectations.

Our quarterly operating results have fluctuated and may continue to fluctuate. Consequently, our operating results may fail to meet the expectations of analysts and investors. As a result of industry conditions and the following specific factors, our quarterly operating results are more likely to fluctuate and are more difficult to predict than a typical non-technology company of our size and maturity:

·       general economic conditions in the countries where we sell our products;

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·       conditions within the end markets into which we sell our products;

·       the cyclical nature of demand for our customers’ products;

·       excessive inventory accumulation by our end customers;

·       the timing of our and our competitors’ new product introductions;

·       product obsolescence;

·       the scheduling, rescheduling and cancellation of large orders by our customers;

·       our ability to develop new process technologies and achieve volume production at the fabs of Seiko Epson, UMC, Chartered Semiconductor, Fujitsu or at other foundries;

·       changes in manufacturing yields including delays in achieving target yields on New products;

·       adverse movements in exchange rates, interest rates or tax rates; and

·       the availability of adequate supply commitments from our wafer foundries and assembly and test subcontractors.

As a result of these factors, our past financial results are not necessarily a good predictor of our future results.

Our stock price may continue to experience large fluctuations.

In recent years, the price of our common stock has fluctuated greatly. These price fluctuations have been rapid and severe and have left investors little time to react. The price of our common stock may continue to fluctuate greatly in the future due to a variety of company specific factors, including:

·       quarter-to-quarter variations in our operating results;

·       shortfalls in revenue or earnings from levels expected by securities analysts; and

·       announcements of technological innovations or new products by other companies.

At December 31, 2004, our book value per share was $4.78, compared to our stock price which has ranged from a low of $3.96 per share to a high of $6.35 per share in the six months ended December 31, 2004. Presently, our stock price is trading near our consolidated book value. Should our stock price drop below book value for a sustained period, it may become necessary to record an impairment charge to goodwill which would reduce our results of operations (see Note 8 of our Consolidated Financial Statements).

Our wafer supply may be interrupted or reduced, which may result in a shortage of products available for sale.

We do not manufacture finished silicon wafers. Currently, our silicon wafers are manufactured by Seiko Epson in Japan, UMC in Taiwan, and Chartered Semiconductor in Singapore. If any of our current or future foundry partners significantly interrupts or reduces our wafer supply, our operating results could be harmed.

In the past, we have experienced delays in obtaining wafers and in securing supply commitments from our foundries. At present, we anticipate that our supply commitments are adequate. However, these existing supply commitments may not be sufficient for us to satisfy customer demand in future periods. Additionally, notwithstanding our supply commitments we may still have difficulty in obtaining wafer deliveries consistent with the supply commitments. We negotiate wafer prices and supply commitments from our suppliers on at least an annual basis. If any of our foundry partners were to reduce its supply

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commitment or increase its wafer prices, and we cannot find alternative sources of wafer supply, our operating results could be harmed.

Many other factors that could disrupt our wafer supply are beyond our control. Since worldwide manufacturing capacity for silicon wafers is limited and inelastic, we could be harmed by significant industry-wide increases in overall wafer demand or interruptions in wafer supply. Additionally, a future disruption of any of our foundry partners’ foundry operations as a result of a fire, earthquake, act of terrorism, political unrest, governmental uncertainty, war, or other natural disaster or catastrophic event could disrupt our wafer supply and could harm our operating results.

If our foundry partners experience quality or yield problems, we may face a shortage of products available for sale.

We depend on our foundries to deliver reliable silicon wafers with acceptable yields in a timely manner. As is common in our industry, we have experienced wafer yield problems and delivery delays. If our foundries are unable for a prolonged period to produce silicon wafers that meet our specifications, with acceptable yields, our operating results could be harmed.

The majority of our revenue is derived from products based on a specialized silicon wafer manufacturing process technology called E²CMOS^®. The reliable manufacture of high performance E²CMOS semiconductor wafers is a complicated and technically demanding process requiring:

·       a high degree of technical skill;

·       state-of-the-art equipment;

·       the absence of defects in production wafers;

·       the elimination of minute impurities and errors in each step of the fabrication process; and

·       effective cooperation between the wafer supplier and us.

As a result, our foundries may experience difficulties in achieving acceptable quality and yield levels when manufacturing our silicon wafers.

If our assembly and test contractors experience quality or yield problems, we may face a shortage of products available for sale.

We rely on contractors to assemble and test our devices with acceptable quality and yield levels. As is common in our industry, we have experienced quality and yield problems in the past. If we experience prolonged quality or yield problems in the future, our operating results could be harmed.

The majority of our revenue is derived from semiconductor devices assembled in advanced packages. The assembly of advanced packages is a complex process requiring:

·       a high degree of technical skill;

·       state-of-the-art equipment;

·       the absence of defects in assembly and packaging manufacturing;

·       the elimination of raw material impurities and errors in each step of the process; and

·       effective cooperation between the assembly contractor and us.

As a result, our contractors may experience difficulties in achieving acceptable quality and yield levels when assembling and testing our semiconductor devices.

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Deterioration of conditions in Asia may disrupt our existing supply arrangements and result in a shortage of finished products available for sale.

All of our major silicon wafer suppliers operate fabs located in Asia. Our finished silicon wafers are assembled and tested by independent contractors located in China, Japan, Malaysia, the Philippines, South Korea and Taiwan. Economic, financial, social and political conditions in Asia have historically been volatile. Financial difficulties, governmental actions or restrictions, prolonged work stoppages, political unrest, war or any other difficulties experienced by our suppliers may disrupt our supply and could harm our operating results.

Export sales account for a substantial portion of our revenues and may decline in the future due to economic and governmental uncertainties.

Our export sales are affected by unique risks frequently associated with foreign economies including:

·       changes in local economic conditions;

·       exchange rate volatility;

·       governmental controls and trade restrictions;

·       export license requirements and restrictions on the export of technology;

·       political instability, war or terrorism;

·       changes in tax rates, tariffs or freight rates;

·       interruptions in air transportation; and

·       difficulties in staffing and managing foreign sales offices.

We may not be able to successfully compete in the highly competitive semiconductor industry.

The semiconductor industry is intensely competitive and many of our direct and indirect competitors have substantially greater financial, technological, manufacturing, marketing and sales resources. If we are unable to compete successfully in this environment, our future results will be adversely affected.

The current level of competition in the programmable logic market is high and may increase in the future. We currently compete directly with companies that have licensed our technology or have developed similar products. We also compete indirectly with numerous semiconductor companies that offer products based on alternative technical solutions. These direct and indirect competitors are established multinational semiconductor companies as well as emerging companies.

We may fail to retain or attract the specialized technical and management personnel required to successfully operate our business.

To a greater degree than most non-technology companies or larger technology companies, our future success depends on our ability to attract and retain highly qualified technical and management personnel. As a mid-sized company, we are particularly dependent on a relatively small group of key employees. Competition for skilled technical and management employees is intense within our industry. As a result, we may not be able to retain our existing key technical and management personnel. In addition, we may not be able to attract additional qualified employees in the future. If we are unable to retain existing key employees or are unable to hire new qualified employees, our operating results could be adversely affected.

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If we are unable to adequately protect our intellectual property rights, our financial results and competitive position may suffer.

Our success depends in part on our proprietary technology. However, we may fail to adequately protect this technology. As a result, we may lose our competitive position or face significant expense to protect or enforce our intellectual property rights.

We intend to continue to protect our proprietary technology through patents, copyrights and trade secrets. Despite this intention, we may not be successful in achieving adequate protection. Claims allowed on any of our patents may not be sufficiently broad to protect our technology. Patents issued to us also may be challenged, invalidated or circumvented. Finally, our competitors may develop similar technology independently.

Companies in the semiconductor industry vigorously pursue their intellectual property rights. If we become involved in protracted intellectual property disputes or litigation we may be forced to use substantial financial and management resources, which could have an adverse effect on our operating results.

Our industry is characterized by frequent claims regarding patents and other intellectual property rights of others. We have been, and from time-to-time expect to be, notified of claims that we are infringing the intellectual property rights of others. If any third party makes a valid claim against us, we could face significant liability and could be required to make material changes to our products and processes. In response to any claims of infringement, we may seek licenses under patents that we are alleged to be infringing. However, we may not be able to obtain a license on favorable terms, or at all, without our operating results being adversely affected.

Our marketable securities, which we hold for strategic reasons, are subject to equity price risk and their value may fluctuate.

Currently we hold substantial equity in UMC, which we acquired as part of a strategic investment to obtain certain manufacturing rights. The market price and valuation of these equity shares has fluctuated widely due to business, stock market or other conditions over which we have little control. During the year ended December 31, 2001, we recorded a pre-tax impairment loss related to this investment. In the future, UMC shares may continue to experience significant price volatility. In 2002 and in 2004, we sold a portion of our UMC shares, but have otherwise not attempted to reduce or eliminate this equity price risk through hedging or similar techniques and hence substantial, sustained changes in the market price of UMC shares could impact our financial results. To the extent that the market value of our UMC shares experiences a significant decline for an extended period of time, our operating results could be adversely affected.

Changes in accounting for equity compensation will adversely affect operating results and could adversely affect our ability to attract and retain employees.

We have historically used stock options as a key component of employee compensation in order to align employees’ interests with the interests of our stockholders, encourage employee retention, and provide competitive compensation packages. The Financial Accounting Standards Board has adopted changes to generally accepted accounting principles that require us and other companies to record a charge to earnings for employee stock option grants and other equity incentives beginning in the quarter ended September 30, 2005. To the extent that these or other new regulations make it more difficult or expensive to grant options to employees, we will incur increased compensation costs. We may also change our equity compensation strategy or find it difficult to attract, retain and motivate employees. Any of these results could materially and adversely affect our business.

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Item 7(a). Quantitative and Qualitative Disclosures About Market Risk.

As of December 31, 2004 and December 31, 2003 our investment portfolio consisted of fixed income securities of $287.0 million and $275.0 million, respectively. As with all fixed income instruments, these securities are subject to interest rate risk and will decline in value if market interest rates increase. If market rates were to increase immediately and uniformly by 10% from levels as of December 31, 2004 and December 31, 2003, the decline in the fair value of our portfolio would not be material. Furthermore, we have the ability to hold our fixed income investments until maturity and, therefore, we would not expect to recognize such an adverse impact in our results from operations or statement of cash flows.

We have international subsidiary and branch operations. Additionally, we sell products to Japanese customers denominated in Yen. We therefore are subject to foreign currency rate exposure. To minimize foreign exchange risk related to Yen-based net assets on our Consolidated Balance Sheet, on August 11, 2004, we entered into an agreement with a bank under the terms of which we can borrow up to $6.0 million in Japanese Yen in a revolving line of credit arrangement. Outstanding borrowing is collateralized by marketable securities. Interest on outstanding borrowing is based on the Japanese LIBOR Fixed Rate, and averaged 1.04% for the year ended December 31, 2004. Outstanding borrowing at December 31, 2004 was $2.9 million. This arrangement can be terminated at anytime by either party.

We are exposed to equity price risk due to our equity investment in UMC (see note 7 to our Consolidated Financial Statements). Neither a 10% increase nor a further 10% decrease in equity price related to this investment would have a material effect on our Consolidated Financial Statements as of December 31, 2004 or December 31, 2003. We have not attempted to reduce or eliminate this equity price risk through hedging or similar techniques. As a result, sustained changes in the market price of UMC shares could impact our financial results. To the extent that the market value of our UMC shares experiences further deterioration for an extended period of time, our operating results could be adversely affected.

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Item 8. Financial Statements and Supplementary Data.

Index to Consolidated Financial Statements and Consolidated Financial Statement Schedules

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LATTICE SEMICONDUCTOR CORPORATION
CONSOLIDATED BALANCE SHEET
(in thousands, except share and par value amounts)

The accompanying notes are an integral part of this statement.

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LATTICE SEMICONDUCTOR CORPORATION
CONSOLIDATED STATEMENT OF OPERATIONS
(in thousands, except per share amounts)