Lattice Propel Design Environment Supports New RISC-V Processor and IP Cores
“RISC-V cores deliver excellent software-programmable Edge processing performance at low power, making them a compelling solution for accelerating data processing in power-sensitive applications like the autonomous battery-powered robots used in factories and warehouses,” said Roger Do, Senior Product Line Manager, Software, Lattice. “Propel 2.0 gives our customers the ability to differentiate their products thanks to a new IP capability that lets developers integrate their own or third-party party IP into Lattice Propel-based designs.”
Lattice Propel 2.0 adds support for a new RISC-V RV32I processor core variant that can be implemented in as few as 800 LUTs (less than 5 percent of the total LUTs on a Lattice Nexus™ FPGA). The core’s five-stage data pipeline enables faster data rates and supports key features such as optional debug, timer, and interrupt capabilities. Propel 2.0 includes support for EtherConnect, power module distribution (PDM), I2C Master, and QSPI flash memory controller IP blocks.
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