LatticeECP3 FPGA Family Named Finalist in Prestigious e-Legacy Awards Competition
The Environmental Design award for which the LatticeECP3 FPGA family is a finalist recognizes energy-saving or fuel/power-efficient electronic design. "Our ECP3 FPGA family was designed from the bottom up to be the lowest power SERDES-capable device in the industry without sacrificing the benefits of high speed serial I/O and processing capabilities," said Sean Riley, Lattice Corporate Vice President and General Manager of High Density Solutions. "Being a finalist for the Environmental Design award is particularly gratifying because it reinforces what our customers have been telling us: that our ECP3 family offers an unprecedented combination of low power and high value."
Finalists were chosen by a panel of industry experts, and the winners will be selected by the readers of Electronic Product Design magazine, who are invited to vote via email, online and in print until November. Online voting is available at http://www.epdonthenet.net/awards_vote.aspx
"We received a record number of entries this year, up by 12% on last year," said Esther Waite on behalf of Electronic Product Design magazine. "The number of entries made the judges' job in picking the finalists particularly difficult. However, this has resulted in an excellent group of finalists in each category." Winners will be announced at the e-Legacy Awards luncheon at the Roof Gardens in Kensington, London on Wednesday, November 4th.
About the LatticeECP3 FPGA Family
The LatticeECP3 FPGA family is comprised of five devices that offer standards-compliant multi-protocol 3G SERDES, DDR1/2/3 memory interfaces for low cost FPGAs and high performance, cascadable DSP slices that are ideal for high performance RF, baseband and image signal processing. Toggling at 1Gbps, the LatticeECP3 FPGAs also feature the fastest LVDS I/O available in a mid-range FPGA family, as well as embedded memory of up to 6.8 Mbits. Logic density varies from 17K LUTs to 149K LUTs with up to 586 user I/O. The LatticeECP3 FPGA family's high performance features include:
-- 3.2Gbps SERDES with 10GbE XAUI jitter compliance and the ability to
mix and match multiple protocols on each SERDES quad. This includes PCI
Express, CPRI, OBSAI, XAUI, Serial RapidIO and SGMII/Gigabit Ethernet.
-- The SERDES/PCS blocks have been designed specifically to enable the
design of the low latency variation CPRI links that are found in wireless
basestations with Remote Radio Head connectivity.
-- Compliance to the SMPTE Serial Digital Interface standard, with the
unprecedented ability to support 3G, HD and SD video broadcast signals
independently on each SERDES channel. The triple rate support is performed
without any oversampling technique, consuming the least possible amount of
power.
-- DSP blocks allowing up to 36x36 Multiply and Accumulate functions
running at >400MHz. The DSP slices also feature innovative cascadability
for implementing wide ALU and adder tree functions without the performance
bottlenecks of FPGA logic.
-- 1Gbps LVDS I/O, with Input Delay blocks, allows interfacing to high
performance ADCs and DACs.
With these features, the LatticeECP3 FPGA family is ideally suited for deployment in high volume cost- and power-sensitive wireless infrastructure and wireline access equipment, as well as video and imaging, applications. For more information about the LatticeECP3 FPGA family, visit http://www.latticesemi.com/products/fpga/ecp3
About Lattice Semiconductor
Lattice is the source for innovative FPGA, PLD, programmable Power Management and Clock Management solutions. For more information, visit www.latticesemi.com
Lattice Semiconductor Corporation, Lattice (& design), L (& design), LatticeECP3 and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.
GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.
EDITORIAL/READER CONTACT: Brian Kiernan Corporate Communications Manager Lattice Semiconductor Corporation 503-268-8739 voice 503-268-8193 fax brian.kiernan@latticesemi.com
SOURCE: Lattice Semiconductor Corporation
mailto:brian.kiernan@latticesemi.com